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种子哈希：99627c5aeb6f06354846ff067eed16639fe969b3
文档大小：613.2 MB
文档个数：77个文档
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收录时间：2020-01-28
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文档列表

Архитектура, SoC, CPU Design/The VLSI Handbook.pdf 50.4 MB
HDL, SDL, Verification/Verilog, System Verilog/HDL Chip Design- A Practical Guide for Designing, Synthesizing and Simulating ASICs and FPGAs Using VHDL or Verilog.pdf 40.6 MB
HDL, SDL, Verification/VHDL/VHDL Programming by Example - Douglas L.Perry.pdf 34.8 MB
Основы цифровой схемотехники/Цифровые системы- теория и практика.djvu 32.9 MB
HDL, SDL, Verification/VHDL/(Ebook) Fundamentals Of Digital Logic With Vhdl.pdf 31.9 MB
HDL, SDL, Verification/Verilog, System Verilog/Advanced_Digital_Design_Verilog_HDL.djvu 23.0 MB
Теоретическая информатика/Handbook of algorithms for physical design automation.pdf 21.4 MB
HDL, SDL, Verification/Verilog, System Verilog/(ebook) Chu - FPGA Prototyping Using Verilog Examples.pdf 19.1 MB
Архитектура, SoC, CPU Design/Addison Wesley - Arm System On Chip Architecture, 2nd Edition 2000.pdf 18.3 MB
Архитектура, SoC, CPU Design/ARM System-on-Chip Architecture.pdf 18.3 MB
ASIC, FPGA, CPLD/Practical FPGA Programming In C (2005).chm 18.2 MB
ASIC, FPGA, CPLD/Advanced ASIC Chip Synthesis [Himanshu Bhatnagar 2002].pdf 16.4 MB
HDL, SDL, Verification/Verilog, System Verilog/Poliakov_Yazyki_VHDL_i_VERILOG.pdf 13.8 MB
Архитектура, SoC, CPU Design/digital-integrated-circuit-design-from-vlsi-architectures-to-cmos-fabrication.9780521882675.39475.pdf 13.1 MB
HDL, SDL, Verification/Verilog, System Verilog/ReuseMethodologyManual.V2.RMM.Verilog.VHDL.BY.SINX.pdf 11.8 MB
Разное/A Platform-Centric Approach to System-on-Chip (SOC) Design - Springer.pdf 11.2 MB
ASIC, FPGA, CPLD/ASIC Design With Synopsys.pdf 10.9 MB
ASIC, FPGA, CPLD/Memory, Microprocessor, and ASIC [Wai-Kai Chen 2003].pdf 10.1 MB
Разное/The Test Access Port And Boundary Scan Architecture - Colin M Maunder And Rodham E Tulloss - Ieee Computer Society Press.pdf 9.3 MB
Теоретическая информатика/Reconfigurable Computing- The Theory and Practice of FPGA-Based Computation.pdf 9.1 MB
HDL, SDL, Verification/VHDL/Digital Design with CPLD Applications & VHDL (Delmar).pdf 9.0 MB
ASIC, FPGA, CPLD/Design Warrior Guide To Fpga [Clive “Max” Maxfield 2002].pdf 8.5 MB
HDL, SDL, Verification/Verilog, System Verilog/Kluwer.Academic.The.Verilog.Hardware.Description.Language.Fifth.Edition.pdf 8.1 MB
HDL, SDL, Verification/Verilog, System Verilog/THE_DESIGNERS_GUIDE_TO_VERILOG_AMS_Kenneth_Kundert.pdf 7.8 MB
Основы цифровой схемотехники/[FPGA] Introduction to Logic Design (2nd Ed).pdf 7.4 MB
Теоретическая информатика/Synthesis of Arithmetic Circuits--FPGA, ASIC & Embedded Systems.pdf 7.4 MB
ASIC, FPGA, CPLD/Advanced FPGA Design - Architecture, Implementation, and Optimization [Steve Kilts 2007].pdf 7.1 MB
Архитектура, SoC, CPU Design/Springer- System Level Design of Reconfigurable SoC.pdf 6.9 MB
HDL, SDL, Verification/SystemC/SystemC- From the Ground Up [David C. Black 2004].pdf 6.7 MB
ASIC, FPGA, CPLD/Reuse Methodology Manual for System-on-a-Chip (SoC) Designs [Michael Keating 2002].pdf 6.7 MB
Разное/JTAG/(Jtag) Boundary-Scan Test - A Practical Approach - Harry Bleeker - Peter van den Eijnden - Frans de Jong - KLUWER ACADEMIC.pdf 6.6 MB
HDL, SDL, Verification/Verilog, System Verilog/Verilog Quickstart - Practical Guide to Simulation & Synthesis in Verilog (3rd Ed.).pdf 6.4 MB
Physical Design/Nano-CMOS Circuit and Physical Design.pdf 6.1 MB
Основы цифровой схемотехники/Угрюмов - Цифровая схемотехника.djvu 5.7 MB
Разное/digital-logic-testing-and-simulation.pdf 5.5 MB
HDL, SDL, Verification/VHDL/Vhdl Reference Guide From Xilinx.pdf 5.3 MB
HDL, SDL, Verification/VHDL/MIT Press - Circuit Design with VHDL (2005).pdf 5.3 MB
HDL, SDL, Verification/VHDL/Designers_Guide to VHDL_AMS.pdf 5.2 MB
Основы цифровой схемотехники/principles of modern digital design.pdf 5.1 MB
HDL, SDL, Verification/Verilog, System Verilog/Verilog Tutorial.pdf 5.1 MB
Архитектура, SoC, CPU Design/Morgan.Kaufmann-Computer.Architecture.A.Quantitative.Approach.3rd.Edition.pdf 5.1 MB
HDL, SDL, Verification/Kluwer Academic - System-On-A-Chip Verification - Methodology and Techniques - 2002.pdf 4.5 MB
HDL, SDL, Verification/Verilog, System Verilog/Verification Methodology Manual for SystemVerilog.pdf 4.4 MB
HDL, SDL, Verification/Verilog, System Verilog/SystemVerilog_3.1a Language Reference Manual.pdf 4.2 MB
HDL, SDL, Verification/Morgan.Kaufmann.Systems.Engineering.with.SysML.UML.Feb.2008.pdf 3.6 MB
Теоретическая информатика/Logic Synthesis for Compositional Microprogram Control Units.pdf 3.6 MB
HDL, SDL, Verification/Verilog, System Verilog/Hardware Verification With SystemVerilog(May 2007).pdf 3.6 MB
Physical Design/Physical_Design_Essentials.pdf 3.5 MB
Разное/Production Testing of RF and System-on-a-Chip Devices for Wireless Communications (Schaub,Kelly-2004).pdf 3.5 MB
HDL, SDL, Verification/VHDL/ASIC and FPGA Verification (VHDL).pdf 3.3 MB
Архитектура, SoC, CPU Design/Vliw Microprocessor Hardware Design - For Asic And Fpga - Aug 2007(Mcgraw-Hill).pdf 2.9 MB
HDL, SDL, Verification/Verilog, System Verilog/SystemVerilog for Design(Second Edition).pdf 2.6 MB
HDL, SDL, Verification/Verilog, System Verilog/System Verilog for Verification, 2nd Edition.pdf 2.6 MB
HDL, SDL, Verification/SystemC/1666-2005 SystemC LRM.pdf 2.4 MB
HDL, SDL, Verification/Verilog, System Verilog/Digital Design - An Embedded Systems Approach Using Verilog.pdf 2.1 MB
HDL, SDL, Verification/Verilog, System Verilog/Writing testbenches using SystemVerilog.pdf 2.0 MB
HDL, SDL, Verification/SystemC/TLM_2_0_LRM.pdf 2.0 MB
HDL, SDL, Verification/VHDL/IEEE Standard VHDL Language Reference Manual.pdf 1.8 MB
Разное/JTAG/JTAG Specification [IEEE STD-1149_1-2001].pdf 1.3 MB
Архитектура, SoC, CPU Design/Building a RISC and System-on-a-Chip in a FPGA.pdf 1.1 MB
HDL, SDL, Verification/VHDL/Vhdl-Ams.pdf 945.3 kB
Архитектура, SoC, CPU Design/Каршенбоим_Микропроцессор/7.pdf 634.1 kB
HDL, SDL, Verification/Verilog, System Verilog/Kluwer- Digital Computer Arithmetic Datapath Design Using Verilog HDL.pdf 631.6 kB
Архитектура, SoC, CPU Design/Каршенбоим_Микропроцессор/5.pdf 605.5 kB
Архитектура, SoC, CPU Design/Каршенбоим_Микропроцессор/6.pdf 512.8 kB
Архитектура, SoC, CPU Design/Каршенбоим_Микропроцессор/4.pdf 468.1 kB
HDL, SDL, Verification/Verilog, System Verilog/PeterVrlQ.pdf 458.7 kB
Архитектура, SoC, CPU Design/Каршенбоим_Микропроцессор/2.pdf 409.5 kB
HDL, SDL, Verification/Verilog, System Verilog/Ebook Verilog Vhdl Golden Reference Guide.pdf 377.3 kB
HDL, SDL, Verification/VHDL/VHDL-Cookbook.pdf 305.6 kB
Архитектура, SoC, CPU Design/Design A Simple Fpga Risc Cpu And System On A Chip - Slides.pdf 269.1 kB
Архитектура, SoC, CPU Design/Каршенбоим_Микропроцессор/3.pdf 247.8 kB
ASIC, FPGA, CPLD/Architecture of FPGAs and CPLDs A Tutorial.pdf 221.5 kB
ASIC, FPGA, CPLD/Measuring the Gap between FPGAs and ASIC.pdf 156.7 kB
ASIC, FPGA, CPLD/FPGA Routing Architecture.pdf 115.2 kB
Архитектура, SoC, CPU Design/Каршенбоим_Микропроцессор/1.pdf 110.2 kB
HDL, SDL, Verification/vhdl - verilog - systemC.pdf 74.8 kB

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